Daily Blog

A Technology for 3D Integrated Circuits

A new group has been recognized to press forward the Singapore’s next-generation 300mm wafer manufacturing capabilities, by focusing on a technology for 3D integrated circuits (ICs).

In a statement from the Institute of Microelectronics, a research institute under Singapore’s A*Star (Agency for Science, Technology and Research), held the proposal will help accelerate industry adoption of 3D ICs with through-silicon via (TSV) technology, an effort supported by public sector agencies, Economic Development Board and A*Star.

Key benefits 3D ICs, where the ICs are stacked vertically, provide are increased performance, a smaller form factor and cost cutback, according to the IME. TSV, a vertical electrical connection that passes entirely through a silicon wafer or chip, is used in creating 3D ICs or packages.

The research institute noted that 3D IC integration is deemed a means to circumvent scaling limitation of transistors.

The launch of the consortium was “timely” as the global semiconductor industry “is grappling to find solutions to extend the limit of transistor scaling beyond Moore’s Law”, Kwong Dim-Lee, IME’s executive director.

“Over the last few years, IME has established deep competencies and process capabilities for TSV carriers,” he added. “What is unique in this consortium is that we are able to gather key companies across the Singapore semiconductor supply chain, to establish cost-effective TSV process integration and manufacturing capability on 300mm wafers to help accelerate the industry adoption of 3D ICs with TSV,” Kwong explained.

More of the news at zdnetasia.com.